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Trace a circuit from purified crystal to an installed device, and see why semiconductor supply cannot be understood as quantity alone.
From crystal to installed circuit
A semiconductor circuit begins with a material whose electrical behavior can be controlled. For most integrated circuits, producers refine silicon, grow it into a single crystal, slice the crystal into thin wafers, and polish each surface until it is exceptionally flat and clean. SUMCO’s production description shows why a wafer is already a manufactured input rather than a simple piece of sand.
A design company describes the intended circuit digitally. A mask maker turns parts of that description into the patterns used in a fabrication plant, or fab. Inside the fab, the same wafer passes repeatedly through operations that add material, remove it, alter its electrical properties, and connect its devices. The completed wafer is electrically probed; individual rectangles called dies are cut apart; passing dies are attached to packages; and packaged chips are tested before travelling through distributors or directly to makers of vehicles, computers, appliances, network equipment, and other systems.
There is no single geographic route. Design, masks, wafers, fabrication, packaging, testing, board assembly, and final installation may occur in different organizations and countries. Yet the physical object is continuous. Every later participant receives the result of the earlier transformations, including variations that a shipment record cannot show.
The need is a function, not a chip count
People do not ultimately require semiconductors by the unit. They require functions: switching electrical signals, amplifying them, sensing light or temperature, storing information, performing calculations, communicating, and converting or regulating power. A semiconductor is useful because its conductivity can be controlled. In its simplest description, a transistor is a switch operated by voltage; many transistors and other components can be joined into an integrated circuit. The NIST semiconductor glossary explains those relationships without treating the finished chip as the underlying need.
Relays, vacuum tubes, magnetic devices, mechanical controls, and optical components can perform some of the same functions. They generally cannot provide the present combination of size, speed, energy use, reliability, and manufacturable scale. Semiconductor devices are therefore necessary for much of the infrastructure and equipment now in use. That necessity under current conditions does not make the number or arrangement of chips a fixed physical requirement.
Chip demand changes when a genuinely new service is provided, but it also changes with the way a product is organized. A function may be integrated into one device or spread across several controllers. It may happen in a data centre or at the edge of a network. Hardware can be added to improve safety and reliability, to accommodate more demanding software, or to compensate for a design that cannot be repaired or upgraded. Products that are replaced rather than repaired also pull new circuits through the chain. These choices do not all have the same purpose or consequence. Unit demand alone cannot distinguish useful added function from duplicated, stranded, or prematurely discarded capacity.
The wafer keeps the history
Fabrication does not assemble a chip from a set of finished miniature parts. It changes one wafer in place. A light-sensitive coating is exposed through a pattern and developed. Selected material is etched away. Thin films are deposited. Ions are implanted to change electrical behavior. Heating activates or stabilizes some changes. Surfaces are flattened, cleaned, measured, and covered again. The sequence repeats as transistors and the metal paths between them are built in layers.
Each operation inherits the condition left by the one before it. A particle, incorrect film thickness, misplaced pattern, or unsuitable dose may affect one die, many dies, or a whole wafer. Some deviations can be corrected before the next operation. Others become enclosed by later layers. At that point, the remaining action may be to reject affected dies or stop processing the wafer, not to repair the circuit.
Factories therefore inspect and measure during production. Microscopes and other instruments look for defects, dimensions, and the alignment between patterns. These observations are essential process controls, but they are observations of selected properties at selected locations. Even the instrument must be calibrated: NIST describes how a slight electron-beam misalignment can distort a microscope image used in chipmaking.
After processing, a wafer may hold hundreds or thousands of nominally identical dies. Yield is the share that is usable, not the number that was patterned. A statement such as “30,000 wafer starts per month” names the rate at which wafers begin a particular production system. It does not by itself state how many dies fit on each wafer, how many will pass, which performance ranges they will meet, or whether packaging and test can finish them. More wafers and more usable chips are related quantities, not interchangeable ones.
A design is tied to a way of making it
A chip design can cross an ocean as data, but it is not a universal instruction that any fab can print. The dimensions, materials, transistor behavior, wiring rules, and expected variation differ by manufacturing process. A foundry supplies a process design kit, or PDK: a set of models and rules that lets designers simulate and check a circuit against that process. TSMC’s account of its interoperable design files notes that accurate process and design rules are required for layout, simulation, and verification.
Before production, design files are converted into mask data and the circuit is checked repeatedly. Early wafers then reveal whether the digital models and physical process produce the intended behavior. Moving the same function to another foundry or even another process within one foundry can require changes to layout, reusable circuit blocks, masks, test programs, and packaging. A customer may also have to qualify the changed part in its own system. This work can be substantial even when unused equipment exists elsewhere.
The commitments begin before any saleable die exists. Designers fund engineering, software tools, masks, prototypes, and qualification. Fabs reserve equipment time and buy materials; packaging and test providers prepare tooling and test programs; customers arrange inventory and approve parts. Money and contractual access determine which of these actions can begin and how much uncertainty an organization can carry. A technically possible redesign is not an available response if the people, time, equipment, production slot, or working money cannot be assembled before the customer’s need.
“Advanced” does not describe the whole chain
Public discussion often compresses the semiconductor industry into its smallest manufacturing processes. Those processes matter for dense logic and memory, but many circuits perform different work. Power-management devices regulate voltage. Analogue circuits connect digital systems to sound, motion, heat, light, and radio signals. Microcontrollers operate motors and simple controls. Some of these products use mature manufacturing processes because those processes deliver the required electrical behavior, reliability, cost, or compatibility.
Lithography—the projection of circuit patterns onto the wafer—illustrates the difference. ASML is the only producer of extreme-ultraviolet, or EUV, lithography systems used for the most intricate layers of leading-edge chips. That fact does not make every chip dependent on EUV. ASML explains that most chips, and even most layers on advanced chips, use older deep-ultraviolet systems. Its EUV description also places that equipment alongside the other lithography needed in a fab.
The relevant constraint is consequently specific. It may be EUV exposure for one leading-edge layer, but for another product it may be mature-node fab time, a particular high-voltage process, a wafer diameter, a chemical, a photomask, test equipment, or a qualified package. Adding capacity in one category does not remove a constraint in another. Geographic concentration matters where a required capability is concentrated; a map of all semiconductor factories cannot establish whether a substitute exists.
The package completes the electrical path
A passing die is still a fragile piece of silicon without a practical way to connect, power, cool, and protect it. During assembly, one or more dies are fixed to a substrate, connected electrically, and enclosed or covered so that the device can be handled and installed. Intel’s assembly and test account describes the package as providing physical strength, thermal protection, and connections to the system.
Packaging can also determine what the circuit is able to do. Instead of fabricating every function on one die, designers can combine smaller dies—often called chiplets—made with different processes. Logic, memory, input-output circuits, and specialised components can then share one package. This can avoid using the newest process where it adds little, but it creates new requirements for substrates, connections, cooling, assembly accuracy, and known-good dies. TSMC’s advanced packaging overview makes the point directly: system performance and function now depend on integration beyond the individual die.
A chain can therefore have fabricated wafers and still lack complete chips. A constrained package substrate, assembly line, or test system can hold usable dies between the fab and the customer. Calling that event a “chip shortage” is correct at the point of use, but it does not locate the missing capability.
Four tests, four different views
Testing is not one final verdict. Semiconductor production asks different questions as the circuit becomes more complete:
- In-process measurement checks physical features such as film thickness, pattern dimensions, alignment, and defects while the wafer can still inform process adjustment.
- Wafer probe contacts each die before cutting and runs electrical tests. The resulting die map helps prevent clearly failing dies from consuming scarce packaging work.
- Package test checks the assembled chip across specified electrical, performance, temperature, or stress conditions. Packaging can reveal or introduce failures that wafer probe could not see.
- System qualification asks whether the part works in the customer’s board, power, cooling, software, and operating environment. A chip that meets its component specification can still be unsuitable for that application.
Each stage reduces uncertainty while leaving other uncertainty for later. A test program samples defined conditions; it cannot reproduce every future combination of voltage, temperature, workload, age, and surrounding components. The record of a pass is evidence that the tested item met the stated limits under that program. It is not a claim that every physical property was observed or that the installed system must work.
The records themselves also describe different objects. A fab lot history follows a group of wafers and process steps. Inspection data describes measured locations or samples. A wafer map identifies die-level test results. Package records add assembly materials and operations. A customer part number may group output from approved sites or revisions. Keeping these identities connected makes later diagnosis possible; the existence of each database alone does not do so.
A shortage can exist inside a running industry
The 2020–2022 disruption showed how quickly thin buffers and product-specific constraints can reach final assembly. In January 2022, the US Department of Commerce reported that respondents to its supply-chain inquiry had seen median chip inventory among consuming companies fall from 40 days in 2019 to fewer than five days in 2021, while demand was reported 17 percent higher and semiconductor facilities were operating at very high utilisation. The Commerce release describes the respondents and limits of that evidence; it is not a measurement of every company or every semiconductor.
A factory can be busy while a customer faces a shortage. The available output may be the wrong design, process, voltage range, memory type, package, or qualification. A distributor may be able to redirect existing stock, but not create a missing part. A fab can change its product mix only within the equipment, recipes, materials, contracts, and qualifications it has. A device maker can redesign a board or qualify a substitute, but that consumes engineering work and time and may alter the finished product.
Orders do not resolve the uncertainty completely. One order can represent immediate production, precautionary inventory, or the same anticipated need placed through more than one route. Suppliers see their customers’ commitments, not necessarily the unique final demand behind every tier. Requiring firm reservations can improve the production signal and fund capacity, while shifting inventory and cancellation exposure toward the buyer. Holding more stock preserves time during a disruption, but it cannot turn a near-equivalent circuit into an approved one.
New fabs can add a particular physical capability after buildings, utilities, tools, materials, trained work, process learning, and customer qualification are in place. They do not reproduce the entire chain merely by opening. The useful question is not whether “capacity” rose, but which process became capable, at what yield, with which packaging and test path, for which qualified designs.
Failure must be able to travel backward
A field failure may first appear as a vehicle that will not start, a network device that resets, or a medical instrument that reports an error. Its cause could lie in system design, software, power or cooling conditions, package assembly, a wafer operation, or the original circuit design. Replacement restores the immediate function without necessarily explaining the event.
Correction requires the observation to travel backward while the relevant identities remain attached: finished system and operating conditions, board and component, package lot and test result, die position and wafer, process history, design revision, and applicable material or equipment records. No participant needs unlimited access to every proprietary detail. The chain does need a route by which the organization able to investigate a cause receives enough evidence to do so and can return a correction to the affected designs, processes, tests, and customers.
Second sourcing, inspection, inventory, and traceability each repair a different vulnerability. A second source helps only after a compatible product and process are qualified. Inspection can find defined deviations but cannot undo buried ones. Inventory provides time, not replacement capability. Traceability can make a cause reachable, but it does not supply the equipment, authority, or money needed to change that cause.
Semiconductor supply therefore cannot be understood from factory counts or a presumed flow of interchangeable chips alone. It depends on the ability to reproduce a specified function through a process that accumulates irreversible physical decisions, and to preserve enough identity and feedback to learn when the result fails. Resilience depends on keeping compatible capability, time, knowledge, and corrective responsibility connected across the organizations that divide that process.
Inside CompanyGraph
Explore the designers, foundries, wafer and equipment suppliers, packaging and test providers, distributors, and customer relationships that connect circuit function to verified semiconductor supply inside CompanyGraph.