VeriSilicon Microelectronics Co., Ltd.
688521 · SSE · China
Builds custom chips for clients by snapping together pre-made circuit modules, then manages production at TSMC or SMIC.
VeriSilicon takes a customer's chip specification and assembles it from a library of pre-built, already-verified circuit blocks, then coordinates fabrication through TSMC or SMIC using design rules tuned through years of real production runs — cutting development time that a conventional chip house would spend building those circuits from scratch. Because the reusable blocks cost almost nothing extra to deploy on a new project, the more of a customer's design they cover, the higher the margin; the fewer they cover, the more the project looks like ordinary custom chip work at ordinary custom margins. Once a finished chip physically embeds those specific blocks and the foundry's tuned design rules, the customer is effectively locked in for the product's commercial life, since switching to a new design partner triggers a full or partial redesign plus a 12-to-18-month automotive qualification cycle. The whole structure breaks down whenever a new technology domain — AI compute architectures, battery-management power circuits — falls outside what the library already covers, because building trustworthy blocks in a new domain takes years of engineering that no amount of hiring can compress, leaving those customers on full-custom economics in the meantime.
How does this company make money?
The company charges clients a fee for the design work done on each custom chip project. It also collects royalties when clients use its proprietary IP blocks — each time a block appears in a shipped design, the company earns a cut. On top of that, it charges fees for managing the manufacturing relationship with TSMC or SMIC, including making sure the design meets the foundry's production requirements.
What makes this company hard to replace?
A finished chip physically contains the company's specific IP blocks and was built using design rules tuned for TSMC or SMIC. Switching to a different design partner means rebuilding part or all of that chip, not just changing a supplier. For automotive and industrial clients, any new design partner then requires a qualification period of 12 to 18 months before production chips can ship — meaning a switch mid-product-life is commercially almost impossible. The foundry tape-out procedures and design rules built up through real production runs are also tied to this company's relationships, adding a further layer of friction.
What limits this company?
The library of pre-built IP blocks is the ceiling. Each new technical area — such as power management for electric vehicles or compute for AI chips — takes years of engineering work to turn into usable, trusted modules. That work cannot be sped up by hiring more people or buying software. Until a new area is covered, any client project touching it turns into a slow, low-margin custom job instead of a fast, high-margin assembly.
What does this company depend on?
The company cannot operate without foundry capacity from TSMC and SMIC to physically manufacture the chips it designs. It also needs software licenses from Cadence and Synopsys — the two main makers of chip-design tools — to build and verify circuits. ARM processor core licenses are required whenever a design includes a CPU. Third-party analog and mixed-signal IP licenses fill gaps in the company's own library. And for clients in restricted countries, export license approvals from regulators must be in place before work can begin.
Who depends on this company?
Consumer electronics companies use the platform to get custom chips to market faster than they could with standard off-the-shelf silicon — if the company stopped, those timelines would stretch significantly. Automotive Tier 1 suppliers building ADAS and infotainment systems depend on custom chips that do not exist in standard product catalogs; without this company, those suppliers would struggle to source equivalent designs. Chinese fabless startups, which do not have their own IP libraries or foundry relationships, depend on the company to develop custom chips at all.
How does this company scale?
Once an IP block is developed and proven, it can be used in many different client designs at almost no extra cost, so each reuse on a new project adds margin without adding significant work. What resists scaling is the IP library itself — adding coverage in a new functional domain still requires years of engineering, every time, regardless of how large the company grows.
What external forces can significantly affect this company?
U.S.-China export controls are the most direct external pressure: restrictions on advanced EDA tools from Cadence and Synopsys, or on SMIC foundry processes, can cut off Chinese clients without any action by the company. The global shift to electric vehicles is creating urgent demand for power-management and battery-control chip designs, which requires building new IP blocks and meeting new automotive safety regulations. The rise of AI workloads is pushing clients toward specialized compute architectures that sit outside the current IP library, creating pressure to invest in new domains before competitors do.
Where is this company structurally vulnerable?
If U.S. export controls cut off Chinese clients from the advanced EDA tools made by Cadence and Synopsys, or from the foundry processes available at SMIC, the company loses its ability to serve Chinese fabless startups — one of its three main client groups — using its current model. Separately, whenever a major technology shift opens a new functional area, such as AI acceleration or battery-system power management, that the IP library does not yet cover, those client projects revert to slow full-custom economics while the company spends years building the missing modules.